`ifndef _ral_blk_REG_PRJ_sys_cfg_rtl_
`define _ral_blk_REG_PRJ_sys_cfg_rtl_

`include "vmm_ral_host_itf.sv"

`include "ral_reg_REG_PRJ_sys_cfg_base_config_rtl.sv"
`include "ral_reg_REG_PRJ_sys_cfg_cfg_info0_rtl.sv"
`include "ral_reg_REG_PRJ_sys_cfg_cfg_info1_rtl.sv"
`include "ral_reg_REG_PRJ_sys_cfg_cfg_info2_rtl.sv"
`include "ral_reg_REG_PRJ_sys_cfg_cfg_info3_rtl.sv"
`include "ral_reg_REG_PRJ_sys_cfg_cfg_info4_rtl.sv"
`include "ral_reg_REG_PRJ_sys_cfg_cfg_info5_rtl.sv"
`include "ral_reg_REG_PRJ_sys_cfg_cfg_info6_rtl.sv"
`include "ral_reg_REG_PRJ_sys_cfg_cfg_info7_rtl.sv"
`include "ral_reg_REG_PRJ_sys_cfg_cal_config_rtl.sv"


interface ral_blk_REG_PRJ_sys_cfg_itf();

logic [1:0] mode_out;
logic mode_rd, mode_wr;
logic mode_wen;
logic [1:0] mode_in;
logic [19:0] kernel_size_out;
logic kernel_size_rd, kernel_size_wr;
logic kernel_size_wen;
logic [19:0] kernel_size_in;
logic [2:0] stride_out;
logic stride_rd, stride_wr;
logic stride_wen;
logic [2:0] stride_in;

logic [2:0] cfg_info0_layer_field0_out;
logic cfg_info0_layer_field0_rd, cfg_info0_layer_field0_wr;
logic cfg_info0_layer_field0_wen;
logic [2:0] cfg_info0_layer_field0_in;
logic [2:0] cfg_info0_layer_field1_out;
logic cfg_info0_layer_field1_rd, cfg_info0_layer_field1_wr;
logic cfg_info0_layer_field1_wen;
logic [2:0] cfg_info0_layer_field1_in;
logic [2:0] cfg_info0_layer_field2_out;
logic cfg_info0_layer_field2_rd, cfg_info0_layer_field2_wr;
logic cfg_info0_layer_field2_wen;
logic [2:0] cfg_info0_layer_field2_in;
logic [2:0] cfg_info0_layer_field3_out;
logic cfg_info0_layer_field3_rd, cfg_info0_layer_field3_wr;
logic cfg_info0_layer_field3_wen;
logic [2:0] cfg_info0_layer_field3_in;
logic [2:0] cfg_info0_layer_field4_out;
logic cfg_info0_layer_field4_rd, cfg_info0_layer_field4_wr;
logic cfg_info0_layer_field4_wen;
logic [2:0] cfg_info0_layer_field4_in;
logic [2:0] cfg_info0_layer_field5_out;
logic cfg_info0_layer_field5_rd, cfg_info0_layer_field5_wr;
logic cfg_info0_layer_field5_wen;
logic [2:0] cfg_info0_layer_field5_in;

logic [2:0] cfg_info1_layer_field0_out;
logic cfg_info1_layer_field0_rd, cfg_info1_layer_field0_wr;
logic cfg_info1_layer_field0_wen;
logic [2:0] cfg_info1_layer_field0_in;
logic [2:0] cfg_info1_layer_field1_out;
logic cfg_info1_layer_field1_rd, cfg_info1_layer_field1_wr;
logic cfg_info1_layer_field1_wen;
logic [2:0] cfg_info1_layer_field1_in;
logic [2:0] cfg_info1_layer_field2_out;
logic cfg_info1_layer_field2_rd, cfg_info1_layer_field2_wr;
logic cfg_info1_layer_field2_wen;
logic [2:0] cfg_info1_layer_field2_in;
logic [2:0] cfg_info1_layer_field3_out;
logic cfg_info1_layer_field3_rd, cfg_info1_layer_field3_wr;
logic cfg_info1_layer_field3_wen;
logic [2:0] cfg_info1_layer_field3_in;
logic [2:0] cfg_info1_layer_field4_out;
logic cfg_info1_layer_field4_rd, cfg_info1_layer_field4_wr;
logic cfg_info1_layer_field4_wen;
logic [2:0] cfg_info1_layer_field4_in;
logic [2:0] cfg_info1_layer_field5_out;
logic cfg_info1_layer_field5_rd, cfg_info1_layer_field5_wr;
logic cfg_info1_layer_field5_wen;
logic [2:0] cfg_info1_layer_field5_in;

logic [2:0] cfg_info2_layer_field0_out;
logic cfg_info2_layer_field0_rd, cfg_info2_layer_field0_wr;
logic cfg_info2_layer_field0_wen;
logic [2:0] cfg_info2_layer_field0_in;
logic [2:0] cfg_info2_layer_field1_out;
logic cfg_info2_layer_field1_rd, cfg_info2_layer_field1_wr;
logic cfg_info2_layer_field1_wen;
logic [2:0] cfg_info2_layer_field1_in;
logic [2:0] cfg_info2_layer_field2_out;
logic cfg_info2_layer_field2_rd, cfg_info2_layer_field2_wr;
logic cfg_info2_layer_field2_wen;
logic [2:0] cfg_info2_layer_field2_in;
logic [2:0] cfg_info2_layer_field3_out;
logic cfg_info2_layer_field3_rd, cfg_info2_layer_field3_wr;
logic cfg_info2_layer_field3_wen;
logic [2:0] cfg_info2_layer_field3_in;
logic [2:0] cfg_info2_layer_field4_out;
logic cfg_info2_layer_field4_rd, cfg_info2_layer_field4_wr;
logic cfg_info2_layer_field4_wen;
logic [2:0] cfg_info2_layer_field4_in;
logic [2:0] cfg_info2_layer_field5_out;
logic cfg_info2_layer_field5_rd, cfg_info2_layer_field5_wr;
logic cfg_info2_layer_field5_wen;
logic [2:0] cfg_info2_layer_field5_in;

logic [2:0] cfg_info3_layer_field0_out;
logic cfg_info3_layer_field0_rd, cfg_info3_layer_field0_wr;
logic cfg_info3_layer_field0_wen;
logic [2:0] cfg_info3_layer_field0_in;
logic [2:0] cfg_info3_layer_field1_out;
logic cfg_info3_layer_field1_rd, cfg_info3_layer_field1_wr;
logic cfg_info3_layer_field1_wen;
logic [2:0] cfg_info3_layer_field1_in;
logic [2:0] cfg_info3_layer_field2_out;
logic cfg_info3_layer_field2_rd, cfg_info3_layer_field2_wr;
logic cfg_info3_layer_field2_wen;
logic [2:0] cfg_info3_layer_field2_in;
logic [2:0] cfg_info3_layer_field3_out;
logic cfg_info3_layer_field3_rd, cfg_info3_layer_field3_wr;
logic cfg_info3_layer_field3_wen;
logic [2:0] cfg_info3_layer_field3_in;
logic [2:0] cfg_info3_layer_field4_out;
logic cfg_info3_layer_field4_rd, cfg_info3_layer_field4_wr;
logic cfg_info3_layer_field4_wen;
logic [2:0] cfg_info3_layer_field4_in;
logic [2:0] cfg_info3_layer_field5_out;
logic cfg_info3_layer_field5_rd, cfg_info3_layer_field5_wr;
logic cfg_info3_layer_field5_wen;
logic [2:0] cfg_info3_layer_field5_in;

logic [2:0] cfg_info4_layer_field0_out;
logic cfg_info4_layer_field0_rd, cfg_info4_layer_field0_wr;
logic cfg_info4_layer_field0_wen;
logic [2:0] cfg_info4_layer_field0_in;
logic [2:0] cfg_info4_layer_field1_out;
logic cfg_info4_layer_field1_rd, cfg_info4_layer_field1_wr;
logic cfg_info4_layer_field1_wen;
logic [2:0] cfg_info4_layer_field1_in;
logic [2:0] cfg_info4_layer_field2_out;
logic cfg_info4_layer_field2_rd, cfg_info4_layer_field2_wr;
logic cfg_info4_layer_field2_wen;
logic [2:0] cfg_info4_layer_field2_in;
logic [2:0] cfg_info4_layer_field3_out;
logic cfg_info4_layer_field3_rd, cfg_info4_layer_field3_wr;
logic cfg_info4_layer_field3_wen;
logic [2:0] cfg_info4_layer_field3_in;
logic [2:0] cfg_info4_layer_field4_out;
logic cfg_info4_layer_field4_rd, cfg_info4_layer_field4_wr;
logic cfg_info4_layer_field4_wen;
logic [2:0] cfg_info4_layer_field4_in;
logic [2:0] cfg_info4_layer_field5_out;
logic cfg_info4_layer_field5_rd, cfg_info4_layer_field5_wr;
logic cfg_info4_layer_field5_wen;
logic [2:0] cfg_info4_layer_field5_in;

logic [2:0] cfg_info5_layer_field0_out;
logic cfg_info5_layer_field0_rd, cfg_info5_layer_field0_wr;
logic cfg_info5_layer_field0_wen;
logic [2:0] cfg_info5_layer_field0_in;
logic [2:0] cfg_info5_layer_field1_out;
logic cfg_info5_layer_field1_rd, cfg_info5_layer_field1_wr;
logic cfg_info5_layer_field1_wen;
logic [2:0] cfg_info5_layer_field1_in;
logic [2:0] cfg_info5_layer_field2_out;
logic cfg_info5_layer_field2_rd, cfg_info5_layer_field2_wr;
logic cfg_info5_layer_field2_wen;
logic [2:0] cfg_info5_layer_field2_in;
logic [2:0] cfg_info5_layer_field3_out;
logic cfg_info5_layer_field3_rd, cfg_info5_layer_field3_wr;
logic cfg_info5_layer_field3_wen;
logic [2:0] cfg_info5_layer_field3_in;
logic [2:0] cfg_info5_layer_field4_out;
logic cfg_info5_layer_field4_rd, cfg_info5_layer_field4_wr;
logic cfg_info5_layer_field4_wen;
logic [2:0] cfg_info5_layer_field4_in;
logic [2:0] cfg_info5_layer_field5_out;
logic cfg_info5_layer_field5_rd, cfg_info5_layer_field5_wr;
logic cfg_info5_layer_field5_wen;
logic [2:0] cfg_info5_layer_field5_in;

logic [2:0] cfg_info6_layer_field0_out;
logic cfg_info6_layer_field0_rd, cfg_info6_layer_field0_wr;
logic cfg_info6_layer_field0_wen;
logic [2:0] cfg_info6_layer_field0_in;
logic [2:0] cfg_info6_layer_field1_out;
logic cfg_info6_layer_field1_rd, cfg_info6_layer_field1_wr;
logic cfg_info6_layer_field1_wen;
logic [2:0] cfg_info6_layer_field1_in;
logic [2:0] cfg_info6_layer_field2_out;
logic cfg_info6_layer_field2_rd, cfg_info6_layer_field2_wr;
logic cfg_info6_layer_field2_wen;
logic [2:0] cfg_info6_layer_field2_in;
logic [2:0] cfg_info6_layer_field3_out;
logic cfg_info6_layer_field3_rd, cfg_info6_layer_field3_wr;
logic cfg_info6_layer_field3_wen;
logic [2:0] cfg_info6_layer_field3_in;
logic [2:0] cfg_info6_layer_field4_out;
logic cfg_info6_layer_field4_rd, cfg_info6_layer_field4_wr;
logic cfg_info6_layer_field4_wen;
logic [2:0] cfg_info6_layer_field4_in;
logic [2:0] cfg_info6_layer_field5_out;
logic cfg_info6_layer_field5_rd, cfg_info6_layer_field5_wr;
logic cfg_info6_layer_field5_wen;
logic [2:0] cfg_info6_layer_field5_in;

logic [2:0] cfg_info7_layer_field0_out;
logic cfg_info7_layer_field0_rd, cfg_info7_layer_field0_wr;
logic cfg_info7_layer_field0_wen;
logic [2:0] cfg_info7_layer_field0_in;
logic [2:0] cfg_info7_layer_field1_out;
logic cfg_info7_layer_field1_rd, cfg_info7_layer_field1_wr;
logic cfg_info7_layer_field1_wen;
logic [2:0] cfg_info7_layer_field1_in;
logic [2:0] cfg_info7_layer_field2_out;
logic cfg_info7_layer_field2_rd, cfg_info7_layer_field2_wr;
logic cfg_info7_layer_field2_wen;
logic [2:0] cfg_info7_layer_field2_in;
logic [2:0] cfg_info7_layer_field3_out;
logic cfg_info7_layer_field3_rd, cfg_info7_layer_field3_wr;
logic cfg_info7_layer_field3_wen;
logic [2:0] cfg_info7_layer_field3_in;
logic [2:0] cfg_info7_layer_field4_out;
logic cfg_info7_layer_field4_rd, cfg_info7_layer_field4_wr;
logic cfg_info7_layer_field4_wen;
logic [2:0] cfg_info7_layer_field4_in;
logic [2:0] cfg_info7_layer_field5_out;
logic cfg_info7_layer_field5_rd, cfg_info7_layer_field5_wr;
logic cfg_info7_layer_field5_wen;
logic [2:0] cfg_info7_layer_field5_in;

logic [2:0] cal_mode_out;
logic cal_mode_rd, cal_mode_wr;
logic cal_mode_wen;
logic [2:0] cal_mode_in;
logic [2:0] cal_round_out;
logic cal_round_rd, cal_round_wr;
logic cal_round_wen;
logic [2:0] cal_round_in;
logic [2:0] cvt_mode_out;
logic cvt_mode_rd, cvt_mode_wr;
logic cvt_mode_wen;
logic [2:0] cvt_mode_in;


modport regs(output mode_out,
             output mode_rd,
             output mode_wr,
             input mode_wen,
             input mode_in,
             output kernel_size_out,
             output kernel_size_rd,
             output kernel_size_wr,
             input kernel_size_wen,
             input kernel_size_in,
             output stride_out,
             output stride_rd,
             output stride_wr,
             input stride_wen,
             input stride_in,
             output cfg_info0_layer_field0_out,
             output cfg_info0_layer_field0_rd,
             output cfg_info0_layer_field0_wr,
             input cfg_info0_layer_field0_wen,
             input cfg_info0_layer_field0_in,
             output cfg_info0_layer_field1_out,
             output cfg_info0_layer_field1_rd,
             output cfg_info0_layer_field1_wr,
             input cfg_info0_layer_field1_wen,
             input cfg_info0_layer_field1_in,
             output cfg_info0_layer_field2_out,
             output cfg_info0_layer_field2_rd,
             output cfg_info0_layer_field2_wr,
             input cfg_info0_layer_field2_wen,
             input cfg_info0_layer_field2_in,
             output cfg_info0_layer_field3_out,
             output cfg_info0_layer_field3_rd,
             output cfg_info0_layer_field3_wr,
             input cfg_info0_layer_field3_wen,
             input cfg_info0_layer_field3_in,
             output cfg_info0_layer_field4_out,
             output cfg_info0_layer_field4_rd,
             output cfg_info0_layer_field4_wr,
             input cfg_info0_layer_field4_wen,
             input cfg_info0_layer_field4_in,
             output cfg_info0_layer_field5_out,
             output cfg_info0_layer_field5_rd,
             output cfg_info0_layer_field5_wr,
             input cfg_info0_layer_field5_wen,
             input cfg_info0_layer_field5_in,
             output cfg_info1_layer_field0_out,
             output cfg_info1_layer_field0_rd,
             output cfg_info1_layer_field0_wr,
             input cfg_info1_layer_field0_wen,
             input cfg_info1_layer_field0_in,
             output cfg_info1_layer_field1_out,
             output cfg_info1_layer_field1_rd,
             output cfg_info1_layer_field1_wr,
             input cfg_info1_layer_field1_wen,
             input cfg_info1_layer_field1_in,
             output cfg_info1_layer_field2_out,
             output cfg_info1_layer_field2_rd,
             output cfg_info1_layer_field2_wr,
             input cfg_info1_layer_field2_wen,
             input cfg_info1_layer_field2_in,
             output cfg_info1_layer_field3_out,
             output cfg_info1_layer_field3_rd,
             output cfg_info1_layer_field3_wr,
             input cfg_info1_layer_field3_wen,
             input cfg_info1_layer_field3_in,
             output cfg_info1_layer_field4_out,
             output cfg_info1_layer_field4_rd,
             output cfg_info1_layer_field4_wr,
             input cfg_info1_layer_field4_wen,
             input cfg_info1_layer_field4_in,
             output cfg_info1_layer_field5_out,
             output cfg_info1_layer_field5_rd,
             output cfg_info1_layer_field5_wr,
             input cfg_info1_layer_field5_wen,
             input cfg_info1_layer_field5_in,
             output cfg_info2_layer_field0_out,
             output cfg_info2_layer_field0_rd,
             output cfg_info2_layer_field0_wr,
             input cfg_info2_layer_field0_wen,
             input cfg_info2_layer_field0_in,
             output cfg_info2_layer_field1_out,
             output cfg_info2_layer_field1_rd,
             output cfg_info2_layer_field1_wr,
             input cfg_info2_layer_field1_wen,
             input cfg_info2_layer_field1_in,
             output cfg_info2_layer_field2_out,
             output cfg_info2_layer_field2_rd,
             output cfg_info2_layer_field2_wr,
             input cfg_info2_layer_field2_wen,
             input cfg_info2_layer_field2_in,
             output cfg_info2_layer_field3_out,
             output cfg_info2_layer_field3_rd,
             output cfg_info2_layer_field3_wr,
             input cfg_info2_layer_field3_wen,
             input cfg_info2_layer_field3_in,
             output cfg_info2_layer_field4_out,
             output cfg_info2_layer_field4_rd,
             output cfg_info2_layer_field4_wr,
             input cfg_info2_layer_field4_wen,
             input cfg_info2_layer_field4_in,
             output cfg_info2_layer_field5_out,
             output cfg_info2_layer_field5_rd,
             output cfg_info2_layer_field5_wr,
             input cfg_info2_layer_field5_wen,
             input cfg_info2_layer_field5_in,
             output cfg_info3_layer_field0_out,
             output cfg_info3_layer_field0_rd,
             output cfg_info3_layer_field0_wr,
             input cfg_info3_layer_field0_wen,
             input cfg_info3_layer_field0_in,
             output cfg_info3_layer_field1_out,
             output cfg_info3_layer_field1_rd,
             output cfg_info3_layer_field1_wr,
             input cfg_info3_layer_field1_wen,
             input cfg_info3_layer_field1_in,
             output cfg_info3_layer_field2_out,
             output cfg_info3_layer_field2_rd,
             output cfg_info3_layer_field2_wr,
             input cfg_info3_layer_field2_wen,
             input cfg_info3_layer_field2_in,
             output cfg_info3_layer_field3_out,
             output cfg_info3_layer_field3_rd,
             output cfg_info3_layer_field3_wr,
             input cfg_info3_layer_field3_wen,
             input cfg_info3_layer_field3_in,
             output cfg_info3_layer_field4_out,
             output cfg_info3_layer_field4_rd,
             output cfg_info3_layer_field4_wr,
             input cfg_info3_layer_field4_wen,
             input cfg_info3_layer_field4_in,
             output cfg_info3_layer_field5_out,
             output cfg_info3_layer_field5_rd,
             output cfg_info3_layer_field5_wr,
             input cfg_info3_layer_field5_wen,
             input cfg_info3_layer_field5_in,
             output cfg_info4_layer_field0_out,
             output cfg_info4_layer_field0_rd,
             output cfg_info4_layer_field0_wr,
             input cfg_info4_layer_field0_wen,
             input cfg_info4_layer_field0_in,
             output cfg_info4_layer_field1_out,
             output cfg_info4_layer_field1_rd,
             output cfg_info4_layer_field1_wr,
             input cfg_info4_layer_field1_wen,
             input cfg_info4_layer_field1_in,
             output cfg_info4_layer_field2_out,
             output cfg_info4_layer_field2_rd,
             output cfg_info4_layer_field2_wr,
             input cfg_info4_layer_field2_wen,
             input cfg_info4_layer_field2_in,
             output cfg_info4_layer_field3_out,
             output cfg_info4_layer_field3_rd,
             output cfg_info4_layer_field3_wr,
             input cfg_info4_layer_field3_wen,
             input cfg_info4_layer_field3_in,
             output cfg_info4_layer_field4_out,
             output cfg_info4_layer_field4_rd,
             output cfg_info4_layer_field4_wr,
             input cfg_info4_layer_field4_wen,
             input cfg_info4_layer_field4_in,
             output cfg_info4_layer_field5_out,
             output cfg_info4_layer_field5_rd,
             output cfg_info4_layer_field5_wr,
             input cfg_info4_layer_field5_wen,
             input cfg_info4_layer_field5_in,
             output cfg_info5_layer_field0_out,
             output cfg_info5_layer_field0_rd,
             output cfg_info5_layer_field0_wr,
             input cfg_info5_layer_field0_wen,
             input cfg_info5_layer_field0_in,
             output cfg_info5_layer_field1_out,
             output cfg_info5_layer_field1_rd,
             output cfg_info5_layer_field1_wr,
             input cfg_info5_layer_field1_wen,
             input cfg_info5_layer_field1_in,
             output cfg_info5_layer_field2_out,
             output cfg_info5_layer_field2_rd,
             output cfg_info5_layer_field2_wr,
             input cfg_info5_layer_field2_wen,
             input cfg_info5_layer_field2_in,
             output cfg_info5_layer_field3_out,
             output cfg_info5_layer_field3_rd,
             output cfg_info5_layer_field3_wr,
             input cfg_info5_layer_field3_wen,
             input cfg_info5_layer_field3_in,
             output cfg_info5_layer_field4_out,
             output cfg_info5_layer_field4_rd,
             output cfg_info5_layer_field4_wr,
             input cfg_info5_layer_field4_wen,
             input cfg_info5_layer_field4_in,
             output cfg_info5_layer_field5_out,
             output cfg_info5_layer_field5_rd,
             output cfg_info5_layer_field5_wr,
             input cfg_info5_layer_field5_wen,
             input cfg_info5_layer_field5_in,
             output cfg_info6_layer_field0_out,
             output cfg_info6_layer_field0_rd,
             output cfg_info6_layer_field0_wr,
             input cfg_info6_layer_field0_wen,
             input cfg_info6_layer_field0_in,
             output cfg_info6_layer_field1_out,
             output cfg_info6_layer_field1_rd,
             output cfg_info6_layer_field1_wr,
             input cfg_info6_layer_field1_wen,
             input cfg_info6_layer_field1_in,
             output cfg_info6_layer_field2_out,
             output cfg_info6_layer_field2_rd,
             output cfg_info6_layer_field2_wr,
             input cfg_info6_layer_field2_wen,
             input cfg_info6_layer_field2_in,
             output cfg_info6_layer_field3_out,
             output cfg_info6_layer_field3_rd,
             output cfg_info6_layer_field3_wr,
             input cfg_info6_layer_field3_wen,
             input cfg_info6_layer_field3_in,
             output cfg_info6_layer_field4_out,
             output cfg_info6_layer_field4_rd,
             output cfg_info6_layer_field4_wr,
             input cfg_info6_layer_field4_wen,
             input cfg_info6_layer_field4_in,
             output cfg_info6_layer_field5_out,
             output cfg_info6_layer_field5_rd,
             output cfg_info6_layer_field5_wr,
             input cfg_info6_layer_field5_wen,
             input cfg_info6_layer_field5_in,
             output cfg_info7_layer_field0_out,
             output cfg_info7_layer_field0_rd,
             output cfg_info7_layer_field0_wr,
             input cfg_info7_layer_field0_wen,
             input cfg_info7_layer_field0_in,
             output cfg_info7_layer_field1_out,
             output cfg_info7_layer_field1_rd,
             output cfg_info7_layer_field1_wr,
             input cfg_info7_layer_field1_wen,
             input cfg_info7_layer_field1_in,
             output cfg_info7_layer_field2_out,
             output cfg_info7_layer_field2_rd,
             output cfg_info7_layer_field2_wr,
             input cfg_info7_layer_field2_wen,
             input cfg_info7_layer_field2_in,
             output cfg_info7_layer_field3_out,
             output cfg_info7_layer_field3_rd,
             output cfg_info7_layer_field3_wr,
             input cfg_info7_layer_field3_wen,
             input cfg_info7_layer_field3_in,
             output cfg_info7_layer_field4_out,
             output cfg_info7_layer_field4_rd,
             output cfg_info7_layer_field4_wr,
             input cfg_info7_layer_field4_wen,
             input cfg_info7_layer_field4_in,
             output cfg_info7_layer_field5_out,
             output cfg_info7_layer_field5_rd,
             output cfg_info7_layer_field5_wr,
             input cfg_info7_layer_field5_wen,
             input cfg_info7_layer_field5_in,
             output cal_mode_out,
             output cal_mode_rd,
             output cal_mode_wr,
             input cal_mode_wen,
             input cal_mode_in,
             output cal_round_out,
             output cal_round_rd,
             output cal_round_wr,
             input cal_round_wen,
             input cal_round_in,
             output cvt_mode_out,
             output cvt_mode_rd,
             output cvt_mode_wr,
             input cvt_mode_wen,
             input cvt_mode_in);


modport usr(input mode_out,
            input mode_rd,
            input mode_wr,
            output mode_wen,
            output mode_in,
            input kernel_size_out,
            input kernel_size_rd,
            input kernel_size_wr,
            output kernel_size_wen,
            output kernel_size_in,
            input stride_out,
            input stride_rd,
            input stride_wr,
            output stride_wen,
            output stride_in,
            input cfg_info0_layer_field0_out,
            input cfg_info0_layer_field0_rd,
            input cfg_info0_layer_field0_wr,
            output cfg_info0_layer_field0_wen,
            output cfg_info0_layer_field0_in,
            input cfg_info0_layer_field1_out,
            input cfg_info0_layer_field1_rd,
            input cfg_info0_layer_field1_wr,
            output cfg_info0_layer_field1_wen,
            output cfg_info0_layer_field1_in,
            input cfg_info0_layer_field2_out,
            input cfg_info0_layer_field2_rd,
            input cfg_info0_layer_field2_wr,
            output cfg_info0_layer_field2_wen,
            output cfg_info0_layer_field2_in,
            input cfg_info0_layer_field3_out,
            input cfg_info0_layer_field3_rd,
            input cfg_info0_layer_field3_wr,
            output cfg_info0_layer_field3_wen,
            output cfg_info0_layer_field3_in,
            input cfg_info0_layer_field4_out,
            input cfg_info0_layer_field4_rd,
            input cfg_info0_layer_field4_wr,
            output cfg_info0_layer_field4_wen,
            output cfg_info0_layer_field4_in,
            input cfg_info0_layer_field5_out,
            input cfg_info0_layer_field5_rd,
            input cfg_info0_layer_field5_wr,
            output cfg_info0_layer_field5_wen,
            output cfg_info0_layer_field5_in,
            input cfg_info1_layer_field0_out,
            input cfg_info1_layer_field0_rd,
            input cfg_info1_layer_field0_wr,
            output cfg_info1_layer_field0_wen,
            output cfg_info1_layer_field0_in,
            input cfg_info1_layer_field1_out,
            input cfg_info1_layer_field1_rd,
            input cfg_info1_layer_field1_wr,
            output cfg_info1_layer_field1_wen,
            output cfg_info1_layer_field1_in,
            input cfg_info1_layer_field2_out,
            input cfg_info1_layer_field2_rd,
            input cfg_info1_layer_field2_wr,
            output cfg_info1_layer_field2_wen,
            output cfg_info1_layer_field2_in,
            input cfg_info1_layer_field3_out,
            input cfg_info1_layer_field3_rd,
            input cfg_info1_layer_field3_wr,
            output cfg_info1_layer_field3_wen,
            output cfg_info1_layer_field3_in,
            input cfg_info1_layer_field4_out,
            input cfg_info1_layer_field4_rd,
            input cfg_info1_layer_field4_wr,
            output cfg_info1_layer_field4_wen,
            output cfg_info1_layer_field4_in,
            input cfg_info1_layer_field5_out,
            input cfg_info1_layer_field5_rd,
            input cfg_info1_layer_field5_wr,
            output cfg_info1_layer_field5_wen,
            output cfg_info1_layer_field5_in,
            input cfg_info2_layer_field0_out,
            input cfg_info2_layer_field0_rd,
            input cfg_info2_layer_field0_wr,
            output cfg_info2_layer_field0_wen,
            output cfg_info2_layer_field0_in,
            input cfg_info2_layer_field1_out,
            input cfg_info2_layer_field1_rd,
            input cfg_info2_layer_field1_wr,
            output cfg_info2_layer_field1_wen,
            output cfg_info2_layer_field1_in,
            input cfg_info2_layer_field2_out,
            input cfg_info2_layer_field2_rd,
            input cfg_info2_layer_field2_wr,
            output cfg_info2_layer_field2_wen,
            output cfg_info2_layer_field2_in,
            input cfg_info2_layer_field3_out,
            input cfg_info2_layer_field3_rd,
            input cfg_info2_layer_field3_wr,
            output cfg_info2_layer_field3_wen,
            output cfg_info2_layer_field3_in,
            input cfg_info2_layer_field4_out,
            input cfg_info2_layer_field4_rd,
            input cfg_info2_layer_field4_wr,
            output cfg_info2_layer_field4_wen,
            output cfg_info2_layer_field4_in,
            input cfg_info2_layer_field5_out,
            input cfg_info2_layer_field5_rd,
            input cfg_info2_layer_field5_wr,
            output cfg_info2_layer_field5_wen,
            output cfg_info2_layer_field5_in,
            input cfg_info3_layer_field0_out,
            input cfg_info3_layer_field0_rd,
            input cfg_info3_layer_field0_wr,
            output cfg_info3_layer_field0_wen,
            output cfg_info3_layer_field0_in,
            input cfg_info3_layer_field1_out,
            input cfg_info3_layer_field1_rd,
            input cfg_info3_layer_field1_wr,
            output cfg_info3_layer_field1_wen,
            output cfg_info3_layer_field1_in,
            input cfg_info3_layer_field2_out,
            input cfg_info3_layer_field2_rd,
            input cfg_info3_layer_field2_wr,
            output cfg_info3_layer_field2_wen,
            output cfg_info3_layer_field2_in,
            input cfg_info3_layer_field3_out,
            input cfg_info3_layer_field3_rd,
            input cfg_info3_layer_field3_wr,
            output cfg_info3_layer_field3_wen,
            output cfg_info3_layer_field3_in,
            input cfg_info3_layer_field4_out,
            input cfg_info3_layer_field4_rd,
            input cfg_info3_layer_field4_wr,
            output cfg_info3_layer_field4_wen,
            output cfg_info3_layer_field4_in,
            input cfg_info3_layer_field5_out,
            input cfg_info3_layer_field5_rd,
            input cfg_info3_layer_field5_wr,
            output cfg_info3_layer_field5_wen,
            output cfg_info3_layer_field5_in,
            input cfg_info4_layer_field0_out,
            input cfg_info4_layer_field0_rd,
            input cfg_info4_layer_field0_wr,
            output cfg_info4_layer_field0_wen,
            output cfg_info4_layer_field0_in,
            input cfg_info4_layer_field1_out,
            input cfg_info4_layer_field1_rd,
            input cfg_info4_layer_field1_wr,
            output cfg_info4_layer_field1_wen,
            output cfg_info4_layer_field1_in,
            input cfg_info4_layer_field2_out,
            input cfg_info4_layer_field2_rd,
            input cfg_info4_layer_field2_wr,
            output cfg_info4_layer_field2_wen,
            output cfg_info4_layer_field2_in,
            input cfg_info4_layer_field3_out,
            input cfg_info4_layer_field3_rd,
            input cfg_info4_layer_field3_wr,
            output cfg_info4_layer_field3_wen,
            output cfg_info4_layer_field3_in,
            input cfg_info4_layer_field4_out,
            input cfg_info4_layer_field4_rd,
            input cfg_info4_layer_field4_wr,
            output cfg_info4_layer_field4_wen,
            output cfg_info4_layer_field4_in,
            input cfg_info4_layer_field5_out,
            input cfg_info4_layer_field5_rd,
            input cfg_info4_layer_field5_wr,
            output cfg_info4_layer_field5_wen,
            output cfg_info4_layer_field5_in,
            input cfg_info5_layer_field0_out,
            input cfg_info5_layer_field0_rd,
            input cfg_info5_layer_field0_wr,
            output cfg_info5_layer_field0_wen,
            output cfg_info5_layer_field0_in,
            input cfg_info5_layer_field1_out,
            input cfg_info5_layer_field1_rd,
            input cfg_info5_layer_field1_wr,
            output cfg_info5_layer_field1_wen,
            output cfg_info5_layer_field1_in,
            input cfg_info5_layer_field2_out,
            input cfg_info5_layer_field2_rd,
            input cfg_info5_layer_field2_wr,
            output cfg_info5_layer_field2_wen,
            output cfg_info5_layer_field2_in,
            input cfg_info5_layer_field3_out,
            input cfg_info5_layer_field3_rd,
            input cfg_info5_layer_field3_wr,
            output cfg_info5_layer_field3_wen,
            output cfg_info5_layer_field3_in,
            input cfg_info5_layer_field4_out,
            input cfg_info5_layer_field4_rd,
            input cfg_info5_layer_field4_wr,
            output cfg_info5_layer_field4_wen,
            output cfg_info5_layer_field4_in,
            input cfg_info5_layer_field5_out,
            input cfg_info5_layer_field5_rd,
            input cfg_info5_layer_field5_wr,
            output cfg_info5_layer_field5_wen,
            output cfg_info5_layer_field5_in,
            input cfg_info6_layer_field0_out,
            input cfg_info6_layer_field0_rd,
            input cfg_info6_layer_field0_wr,
            output cfg_info6_layer_field0_wen,
            output cfg_info6_layer_field0_in,
            input cfg_info6_layer_field1_out,
            input cfg_info6_layer_field1_rd,
            input cfg_info6_layer_field1_wr,
            output cfg_info6_layer_field1_wen,
            output cfg_info6_layer_field1_in,
            input cfg_info6_layer_field2_out,
            input cfg_info6_layer_field2_rd,
            input cfg_info6_layer_field2_wr,
            output cfg_info6_layer_field2_wen,
            output cfg_info6_layer_field2_in,
            input cfg_info6_layer_field3_out,
            input cfg_info6_layer_field3_rd,
            input cfg_info6_layer_field3_wr,
            output cfg_info6_layer_field3_wen,
            output cfg_info6_layer_field3_in,
            input cfg_info6_layer_field4_out,
            input cfg_info6_layer_field4_rd,
            input cfg_info6_layer_field4_wr,
            output cfg_info6_layer_field4_wen,
            output cfg_info6_layer_field4_in,
            input cfg_info6_layer_field5_out,
            input cfg_info6_layer_field5_rd,
            input cfg_info6_layer_field5_wr,
            output cfg_info6_layer_field5_wen,
            output cfg_info6_layer_field5_in,
            input cfg_info7_layer_field0_out,
            input cfg_info7_layer_field0_rd,
            input cfg_info7_layer_field0_wr,
            output cfg_info7_layer_field0_wen,
            output cfg_info7_layer_field0_in,
            input cfg_info7_layer_field1_out,
            input cfg_info7_layer_field1_rd,
            input cfg_info7_layer_field1_wr,
            output cfg_info7_layer_field1_wen,
            output cfg_info7_layer_field1_in,
            input cfg_info7_layer_field2_out,
            input cfg_info7_layer_field2_rd,
            input cfg_info7_layer_field2_wr,
            output cfg_info7_layer_field2_wen,
            output cfg_info7_layer_field2_in,
            input cfg_info7_layer_field3_out,
            input cfg_info7_layer_field3_rd,
            input cfg_info7_layer_field3_wr,
            output cfg_info7_layer_field3_wen,
            output cfg_info7_layer_field3_in,
            input cfg_info7_layer_field4_out,
            input cfg_info7_layer_field4_rd,
            input cfg_info7_layer_field4_wr,
            output cfg_info7_layer_field4_wen,
            output cfg_info7_layer_field4_in,
            input cfg_info7_layer_field5_out,
            input cfg_info7_layer_field5_rd,
            input cfg_info7_layer_field5_wr,
            output cfg_info7_layer_field5_wen,
            output cfg_info7_layer_field5_in,
            input cal_mode_out,
            input cal_mode_rd,
            input cal_mode_wr,
            output cal_mode_wen,
            output cal_mode_in,
            input cal_round_out,
            input cal_round_rd,
            input cal_round_wr,
            output cal_round_wen,
            output cal_round_in,
            input cvt_mode_out,
            input cvt_mode_rd,
            input cvt_mode_wr,
            output cvt_mode_wen,
            output cvt_mode_in);

endinterface



module ral_blk_REG_PRJ_sys_cfg_rtl(vmm_ral_host_itf.slave hst,
                                   ral_blk_REG_PRJ_sys_cfg_itf.regs usr);
reg hst_ack;
assign hst.ack = hst_ack;
reg [3:0] base_config_sel;
reg [3:0] cfg_info0_sel;
reg [3:0] cfg_info1_sel;
reg [3:0] cfg_info2_sel;
reg [3:0] cfg_info3_sel;
reg [3:0] cfg_info4_sel;
reg [3:0] cfg_info5_sel;
reg [3:0] cfg_info6_sel;
reg [3:0] cfg_info7_sel;
reg [3:0] cal_config_sel;

always @(*)
   begin
      base_config_sel = 'b0;
      cfg_info0_sel = 'b0;
      cfg_info1_sel = 'b0;
      cfg_info2_sel = 'b0;
      cfg_info3_sel = 'b0;
      cfg_info4_sel = 'b0;
      cfg_info5_sel = 'b0;
      cfg_info6_sel = 'b0;
      cfg_info7_sel = 'b0;
      cal_config_sel = 'b0;

      hst_ack = 0;

      if (hst.adr == 'h0) begin
         base_config_sel = hst.sel[3:0];
         hst_ack = hst.wen;
      end
      if (hst.adr == 'h4) begin
         cfg_info0_sel = hst.sel[3:0];
         hst_ack = hst.wen;
      end
      if (hst.adr == 'h8) begin
         cfg_info1_sel = hst.sel[3:0];
         hst_ack = hst.wen;
      end
      if (hst.adr == 'hc) begin
         cfg_info2_sel = hst.sel[3:0];
         hst_ack = hst.wen;
      end
      if (hst.adr == 'h10) begin
         cfg_info3_sel = hst.sel[3:0];
         hst_ack = hst.wen;
      end
      if (hst.adr == 'h14) begin
         cfg_info4_sel = hst.sel[3:0];
         hst_ack = hst.wen;
      end
      if (hst.adr == 'h18) begin
         cfg_info5_sel = hst.sel[3:0];
         hst_ack = hst.wen;
      end
      if (hst.adr == 'h1c) begin
         cfg_info6_sel = hst.sel[3:0];
         hst_ack = hst.wen;
      end
      if (hst.adr == 'h20) begin
         cfg_info7_sel = hst.sel[3:0];
         hst_ack = hst.wen;
      end
      if (hst.adr == 'h100) begin
         cal_config_sel = hst.sel[3:0];
         hst_ack = hst.wen;
      end
   end


wire [31:0] base_config_out;
ral_reg_REG_PRJ_sys_cfg_base_config_rtl base_config(hst.clk, hst.rstn,
                                                    hst.wdat[31:0], base_config_out, base_config_sel, hst.wen,
                                                    usr.mode_out,
                                                    usr.mode_rd,
                                                    usr.mode_wr,
                                                    usr.mode_wen,
                                                    usr.mode_in,
                                                    usr.kernel_size_out,
                                                    usr.kernel_size_rd,
                                                    usr.kernel_size_wr,
                                                    usr.kernel_size_wen,
                                                    usr.kernel_size_in,
                                                    usr.stride_out,
                                                    usr.stride_rd,
                                                    usr.stride_wr,
                                                    usr.stride_wen,
                                                    usr.stride_in);

wire [31:0] cfg_info0_out;
ral_reg_REG_PRJ_sys_cfg_cfg_info0_rtl cfg_info0(hst.clk, hst.rstn,
                                                hst.wdat[31:0], cfg_info0_out, cfg_info0_sel, hst.wen,
                                                usr.cfg_info0_layer_field0_out,
                                                usr.cfg_info0_layer_field0_rd,
                                                usr.cfg_info0_layer_field0_wr,
                                                usr.cfg_info0_layer_field0_wen,
                                                usr.cfg_info0_layer_field0_in,
                                                usr.cfg_info0_layer_field1_out,
                                                usr.cfg_info0_layer_field1_rd,
                                                usr.cfg_info0_layer_field1_wr,
                                                usr.cfg_info0_layer_field1_wen,
                                                usr.cfg_info0_layer_field1_in,
                                                usr.cfg_info0_layer_field2_out,
                                                usr.cfg_info0_layer_field2_rd,
                                                usr.cfg_info0_layer_field2_wr,
                                                usr.cfg_info0_layer_field2_wen,
                                                usr.cfg_info0_layer_field2_in,
                                                usr.cfg_info0_layer_field3_out,
                                                usr.cfg_info0_layer_field3_rd,
                                                usr.cfg_info0_layer_field3_wr,
                                                usr.cfg_info0_layer_field3_wen,
                                                usr.cfg_info0_layer_field3_in,
                                                usr.cfg_info0_layer_field4_out,
                                                usr.cfg_info0_layer_field4_rd,
                                                usr.cfg_info0_layer_field4_wr,
                                                usr.cfg_info0_layer_field4_wen,
                                                usr.cfg_info0_layer_field4_in,
                                                usr.cfg_info0_layer_field5_out,
                                                usr.cfg_info0_layer_field5_rd,
                                                usr.cfg_info0_layer_field5_wr,
                                                usr.cfg_info0_layer_field5_wen,
                                                usr.cfg_info0_layer_field5_in);

wire [31:0] cfg_info1_out;
ral_reg_REG_PRJ_sys_cfg_cfg_info1_rtl cfg_info1(hst.clk, hst.rstn,
                                                hst.wdat[31:0], cfg_info1_out, cfg_info1_sel, hst.wen,
                                                usr.cfg_info1_layer_field0_out,
                                                usr.cfg_info1_layer_field0_rd,
                                                usr.cfg_info1_layer_field0_wr,
                                                usr.cfg_info1_layer_field0_wen,
                                                usr.cfg_info1_layer_field0_in,
                                                usr.cfg_info1_layer_field1_out,
                                                usr.cfg_info1_layer_field1_rd,
                                                usr.cfg_info1_layer_field1_wr,
                                                usr.cfg_info1_layer_field1_wen,
                                                usr.cfg_info1_layer_field1_in,
                                                usr.cfg_info1_layer_field2_out,
                                                usr.cfg_info1_layer_field2_rd,
                                                usr.cfg_info1_layer_field2_wr,
                                                usr.cfg_info1_layer_field2_wen,
                                                usr.cfg_info1_layer_field2_in,
                                                usr.cfg_info1_layer_field3_out,
                                                usr.cfg_info1_layer_field3_rd,
                                                usr.cfg_info1_layer_field3_wr,
                                                usr.cfg_info1_layer_field3_wen,
                                                usr.cfg_info1_layer_field3_in,
                                                usr.cfg_info1_layer_field4_out,
                                                usr.cfg_info1_layer_field4_rd,
                                                usr.cfg_info1_layer_field4_wr,
                                                usr.cfg_info1_layer_field4_wen,
                                                usr.cfg_info1_layer_field4_in,
                                                usr.cfg_info1_layer_field5_out,
                                                usr.cfg_info1_layer_field5_rd,
                                                usr.cfg_info1_layer_field5_wr,
                                                usr.cfg_info1_layer_field5_wen,
                                                usr.cfg_info1_layer_field5_in);

wire [31:0] cfg_info2_out;
ral_reg_REG_PRJ_sys_cfg_cfg_info2_rtl cfg_info2(hst.clk, hst.rstn,
                                                hst.wdat[31:0], cfg_info2_out, cfg_info2_sel, hst.wen,
                                                usr.cfg_info2_layer_field0_out,
                                                usr.cfg_info2_layer_field0_rd,
                                                usr.cfg_info2_layer_field0_wr,
                                                usr.cfg_info2_layer_field0_wen,
                                                usr.cfg_info2_layer_field0_in,
                                                usr.cfg_info2_layer_field1_out,
                                                usr.cfg_info2_layer_field1_rd,
                                                usr.cfg_info2_layer_field1_wr,
                                                usr.cfg_info2_layer_field1_wen,
                                                usr.cfg_info2_layer_field1_in,
                                                usr.cfg_info2_layer_field2_out,
                                                usr.cfg_info2_layer_field2_rd,
                                                usr.cfg_info2_layer_field2_wr,
                                                usr.cfg_info2_layer_field2_wen,
                                                usr.cfg_info2_layer_field2_in,
                                                usr.cfg_info2_layer_field3_out,
                                                usr.cfg_info2_layer_field3_rd,
                                                usr.cfg_info2_layer_field3_wr,
                                                usr.cfg_info2_layer_field3_wen,
                                                usr.cfg_info2_layer_field3_in,
                                                usr.cfg_info2_layer_field4_out,
                                                usr.cfg_info2_layer_field4_rd,
                                                usr.cfg_info2_layer_field4_wr,
                                                usr.cfg_info2_layer_field4_wen,
                                                usr.cfg_info2_layer_field4_in,
                                                usr.cfg_info2_layer_field5_out,
                                                usr.cfg_info2_layer_field5_rd,
                                                usr.cfg_info2_layer_field5_wr,
                                                usr.cfg_info2_layer_field5_wen,
                                                usr.cfg_info2_layer_field5_in);

wire [31:0] cfg_info3_out;
ral_reg_REG_PRJ_sys_cfg_cfg_info3_rtl cfg_info3(hst.clk, hst.rstn,
                                                hst.wdat[31:0], cfg_info3_out, cfg_info3_sel, hst.wen,
                                                usr.cfg_info3_layer_field0_out,
                                                usr.cfg_info3_layer_field0_rd,
                                                usr.cfg_info3_layer_field0_wr,
                                                usr.cfg_info3_layer_field0_wen,
                                                usr.cfg_info3_layer_field0_in,
                                                usr.cfg_info3_layer_field1_out,
                                                usr.cfg_info3_layer_field1_rd,
                                                usr.cfg_info3_layer_field1_wr,
                                                usr.cfg_info3_layer_field1_wen,
                                                usr.cfg_info3_layer_field1_in,
                                                usr.cfg_info3_layer_field2_out,
                                                usr.cfg_info3_layer_field2_rd,
                                                usr.cfg_info3_layer_field2_wr,
                                                usr.cfg_info3_layer_field2_wen,
                                                usr.cfg_info3_layer_field2_in,
                                                usr.cfg_info3_layer_field3_out,
                                                usr.cfg_info3_layer_field3_rd,
                                                usr.cfg_info3_layer_field3_wr,
                                                usr.cfg_info3_layer_field3_wen,
                                                usr.cfg_info3_layer_field3_in,
                                                usr.cfg_info3_layer_field4_out,
                                                usr.cfg_info3_layer_field4_rd,
                                                usr.cfg_info3_layer_field4_wr,
                                                usr.cfg_info3_layer_field4_wen,
                                                usr.cfg_info3_layer_field4_in,
                                                usr.cfg_info3_layer_field5_out,
                                                usr.cfg_info3_layer_field5_rd,
                                                usr.cfg_info3_layer_field5_wr,
                                                usr.cfg_info3_layer_field5_wen,
                                                usr.cfg_info3_layer_field5_in);

wire [31:0] cfg_info4_out;
ral_reg_REG_PRJ_sys_cfg_cfg_info4_rtl cfg_info4(hst.clk, hst.rstn,
                                                hst.wdat[31:0], cfg_info4_out, cfg_info4_sel, hst.wen,
                                                usr.cfg_info4_layer_field0_out,
                                                usr.cfg_info4_layer_field0_rd,
                                                usr.cfg_info4_layer_field0_wr,
                                                usr.cfg_info4_layer_field0_wen,
                                                usr.cfg_info4_layer_field0_in,
                                                usr.cfg_info4_layer_field1_out,
                                                usr.cfg_info4_layer_field1_rd,
                                                usr.cfg_info4_layer_field1_wr,
                                                usr.cfg_info4_layer_field1_wen,
                                                usr.cfg_info4_layer_field1_in,
                                                usr.cfg_info4_layer_field2_out,
                                                usr.cfg_info4_layer_field2_rd,
                                                usr.cfg_info4_layer_field2_wr,
                                                usr.cfg_info4_layer_field2_wen,
                                                usr.cfg_info4_layer_field2_in,
                                                usr.cfg_info4_layer_field3_out,
                                                usr.cfg_info4_layer_field3_rd,
                                                usr.cfg_info4_layer_field3_wr,
                                                usr.cfg_info4_layer_field3_wen,
                                                usr.cfg_info4_layer_field3_in,
                                                usr.cfg_info4_layer_field4_out,
                                                usr.cfg_info4_layer_field4_rd,
                                                usr.cfg_info4_layer_field4_wr,
                                                usr.cfg_info4_layer_field4_wen,
                                                usr.cfg_info4_layer_field4_in,
                                                usr.cfg_info4_layer_field5_out,
                                                usr.cfg_info4_layer_field5_rd,
                                                usr.cfg_info4_layer_field5_wr,
                                                usr.cfg_info4_layer_field5_wen,
                                                usr.cfg_info4_layer_field5_in);

wire [31:0] cfg_info5_out;
ral_reg_REG_PRJ_sys_cfg_cfg_info5_rtl cfg_info5(hst.clk, hst.rstn,
                                                hst.wdat[31:0], cfg_info5_out, cfg_info5_sel, hst.wen,
                                                usr.cfg_info5_layer_field0_out,
                                                usr.cfg_info5_layer_field0_rd,
                                                usr.cfg_info5_layer_field0_wr,
                                                usr.cfg_info5_layer_field0_wen,
                                                usr.cfg_info5_layer_field0_in,
                                                usr.cfg_info5_layer_field1_out,
                                                usr.cfg_info5_layer_field1_rd,
                                                usr.cfg_info5_layer_field1_wr,
                                                usr.cfg_info5_layer_field1_wen,
                                                usr.cfg_info5_layer_field1_in,
                                                usr.cfg_info5_layer_field2_out,
                                                usr.cfg_info5_layer_field2_rd,
                                                usr.cfg_info5_layer_field2_wr,
                                                usr.cfg_info5_layer_field2_wen,
                                                usr.cfg_info5_layer_field2_in,
                                                usr.cfg_info5_layer_field3_out,
                                                usr.cfg_info5_layer_field3_rd,
                                                usr.cfg_info5_layer_field3_wr,
                                                usr.cfg_info5_layer_field3_wen,
                                                usr.cfg_info5_layer_field3_in,
                                                usr.cfg_info5_layer_field4_out,
                                                usr.cfg_info5_layer_field4_rd,
                                                usr.cfg_info5_layer_field4_wr,
                                                usr.cfg_info5_layer_field4_wen,
                                                usr.cfg_info5_layer_field4_in,
                                                usr.cfg_info5_layer_field5_out,
                                                usr.cfg_info5_layer_field5_rd,
                                                usr.cfg_info5_layer_field5_wr,
                                                usr.cfg_info5_layer_field5_wen,
                                                usr.cfg_info5_layer_field5_in);

wire [31:0] cfg_info6_out;
ral_reg_REG_PRJ_sys_cfg_cfg_info6_rtl cfg_info6(hst.clk, hst.rstn,
                                                hst.wdat[31:0], cfg_info6_out, cfg_info6_sel, hst.wen,
                                                usr.cfg_info6_layer_field0_out,
                                                usr.cfg_info6_layer_field0_rd,
                                                usr.cfg_info6_layer_field0_wr,
                                                usr.cfg_info6_layer_field0_wen,
                                                usr.cfg_info6_layer_field0_in,
                                                usr.cfg_info6_layer_field1_out,
                                                usr.cfg_info6_layer_field1_rd,
                                                usr.cfg_info6_layer_field1_wr,
                                                usr.cfg_info6_layer_field1_wen,
                                                usr.cfg_info6_layer_field1_in,
                                                usr.cfg_info6_layer_field2_out,
                                                usr.cfg_info6_layer_field2_rd,
                                                usr.cfg_info6_layer_field2_wr,
                                                usr.cfg_info6_layer_field2_wen,
                                                usr.cfg_info6_layer_field2_in,
                                                usr.cfg_info6_layer_field3_out,
                                                usr.cfg_info6_layer_field3_rd,
                                                usr.cfg_info6_layer_field3_wr,
                                                usr.cfg_info6_layer_field3_wen,
                                                usr.cfg_info6_layer_field3_in,
                                                usr.cfg_info6_layer_field4_out,
                                                usr.cfg_info6_layer_field4_rd,
                                                usr.cfg_info6_layer_field4_wr,
                                                usr.cfg_info6_layer_field4_wen,
                                                usr.cfg_info6_layer_field4_in,
                                                usr.cfg_info6_layer_field5_out,
                                                usr.cfg_info6_layer_field5_rd,
                                                usr.cfg_info6_layer_field5_wr,
                                                usr.cfg_info6_layer_field5_wen,
                                                usr.cfg_info6_layer_field5_in);

wire [31:0] cfg_info7_out;
ral_reg_REG_PRJ_sys_cfg_cfg_info7_rtl cfg_info7(hst.clk, hst.rstn,
                                                hst.wdat[31:0], cfg_info7_out, cfg_info7_sel, hst.wen,
                                                usr.cfg_info7_layer_field0_out,
                                                usr.cfg_info7_layer_field0_rd,
                                                usr.cfg_info7_layer_field0_wr,
                                                usr.cfg_info7_layer_field0_wen,
                                                usr.cfg_info7_layer_field0_in,
                                                usr.cfg_info7_layer_field1_out,
                                                usr.cfg_info7_layer_field1_rd,
                                                usr.cfg_info7_layer_field1_wr,
                                                usr.cfg_info7_layer_field1_wen,
                                                usr.cfg_info7_layer_field1_in,
                                                usr.cfg_info7_layer_field2_out,
                                                usr.cfg_info7_layer_field2_rd,
                                                usr.cfg_info7_layer_field2_wr,
                                                usr.cfg_info7_layer_field2_wen,
                                                usr.cfg_info7_layer_field2_in,
                                                usr.cfg_info7_layer_field3_out,
                                                usr.cfg_info7_layer_field3_rd,
                                                usr.cfg_info7_layer_field3_wr,
                                                usr.cfg_info7_layer_field3_wen,
                                                usr.cfg_info7_layer_field3_in,
                                                usr.cfg_info7_layer_field4_out,
                                                usr.cfg_info7_layer_field4_rd,
                                                usr.cfg_info7_layer_field4_wr,
                                                usr.cfg_info7_layer_field4_wen,
                                                usr.cfg_info7_layer_field4_in,
                                                usr.cfg_info7_layer_field5_out,
                                                usr.cfg_info7_layer_field5_rd,
                                                usr.cfg_info7_layer_field5_wr,
                                                usr.cfg_info7_layer_field5_wen,
                                                usr.cfg_info7_layer_field5_in);

wire [31:0] cal_config_out;
ral_reg_REG_PRJ_sys_cfg_cal_config_rtl cal_config(hst.clk, hst.rstn,
                                                  hst.wdat[31:0], cal_config_out, cal_config_sel, hst.wen,
                                                  usr.cal_mode_out,
                                                  usr.cal_mode_rd,
                                                  usr.cal_mode_wr,
                                                  usr.cal_mode_wen,
                                                  usr.cal_mode_in,
                                                  usr.cal_round_out,
                                                  usr.cal_round_rd,
                                                  usr.cal_round_wr,
                                                  usr.cal_round_wen,
                                                  usr.cal_round_in,
                                                  usr.cvt_mode_out,
                                                  usr.cvt_mode_rd,
                                                  usr.cvt_mode_wr,
                                                  usr.cvt_mode_wen,
                                                  usr.cvt_mode_in);


reg [31:0] _rdat;
always @(*)
   begin
      _rdat = 32'b0;
      unique casez ({|base_config_sel[3:0],
                    |cfg_info0_sel[3:0], |cfg_info1_sel[3:0],
                    |cfg_info2_sel[3:0], |cfg_info3_sel[3:0],
                    |cfg_info4_sel[3:0], |cfg_info5_sel[3:0],
                    |cfg_info6_sel[3:0], |cfg_info7_sel[3:0],
                    |cal_config_sel[3:0]})
         10'b1?????????: _rdat = base_config_out;
         10'b?1????????: _rdat = cfg_info0_out;
         10'b??1???????: _rdat = cfg_info1_out;
         10'b???1??????: _rdat = cfg_info2_out;
         10'b????1?????: _rdat = cfg_info3_out;
         10'b?????1????: _rdat = cfg_info4_out;
         10'b??????1???: _rdat = cfg_info5_out;
         10'b???????1??: _rdat = cfg_info6_out;
         10'b????????1?: _rdat = cfg_info7_out;
         10'b?????????1: _rdat = cal_config_out;
         default: _rdat = 32'b0;
      endcase
   end
assign hst.rdat[31:0] = _rdat;

endmodule
`endif
